Performance counter 1 metric

Macros
#define	GX_PERF1_TEXELS   0
#define	GX_PERF1_TX_IDLE   1
#define	GX_PERF1_TX_REGS   2
#define	GX_PERF1_TX_MEMSTALL   3
#define	GX_PERF1_TC_CHECK1_2   4
#define	GX_PERF1_TC_CHECK3_4   5
#define	GX_PERF1_TC_CHECK5_6   6
#define	GX_PERF1_TC_CHECK7_8   7
#define	GX_PERF1_TC_MISS   8
#define	GX_PERF1_VC_ELEMQ_FULL   9
#define	GX_PERF1_VC_MISSQ_FULL   10
#define	GX_PERF1_VC_MEMREQ_FULL   11
#define	GX_PERF1_VC_STATUS7   12
#define	GX_PERF1_VC_MISSREP_FULL   13
#define	GX_PERF1_VC_STREAMBUF_LOW   14
#define	GX_PERF1_VC_ALL_STALLS   15
#define	GX_PERF1_VERTICES   16
#define	GX_PERF1_FIFO_REQ   17
#define	GX_PERF1_CALL_REQ   18
#define	GX_PERF1_VC_MISS_REQ   19
#define	GX_PERF1_CP_ALL_REQ   20
#define	GX_PERF1_CLOCKS   21
#define	GX_PERF1_NONE   22

Detailed Description

Performance counter 1 is used for measuring texturing and caching performance as well as FIFO performance.

Note

GX_PERF1_TC_* can be used to compute the texture cache (TC) miss rate. The TC_CHECK* parameters count how many texture cache lines are accessed for each pixel. In the worst case, for a mipmap, up to 8 cache lines may be accessed to produce one textured pixel. GX_PERF1_TC_MISS counts how many of those accesses missed the texture cache. To compute the miss rate, divide GX_PERF1_TC_MISS by the sum of all four GX_PERF1_TC_CHECK* values.

GX_PERF1_VC_* count different vertex cache stall conditions.

Macro Definition Documentation

GX_PERF1_CALL_REQ

#define GX_PERF1_CALL_REQ   18

Number of lines (32B) read from called display lists.

GX_PERF1_CLOCKS

#define GX_PERF1_CLOCKS   21

Number of GP clocks that have elapsed since the last call to GX_ReadGP1Metric().

GX_PERF1_CP_ALL_REQ

#define GX_PERF1_CP_ALL_REQ   20

Counts all requests (32B/request) from the GP Command Processor (CP). It should be equal to the sum of counts returned by GX_PERF1_FIFO_REQ, GX_PERF1_CALL_REQ, and GX_PERF1_VC_MISS_REQ.

GX_PERF1_FIFO_REQ

#define GX_PERF1_FIFO_REQ   17

Number of lines (32B) read from the GP FIFO.

GX_PERF1_NONE

#define GX_PERF1_NONE   22

Disables performance measurement for perf1 and resets the counter.

GX_PERF1_TC_CHECK1_2

#define GX_PERF1_TC_CHECK1_2   4

GX_PERF1_TC_CHECK3_4

#define GX_PERF1_TC_CHECK3_4   5

GX_PERF1_TC_CHECK5_6

#define GX_PERF1_TC_CHECK5_6   6

GX_PERF1_TC_CHECK7_8

#define GX_PERF1_TC_CHECK7_8   7

GX_PERF1_TC_MISS

#define GX_PERF1_TC_MISS   8

Number of texture cache misses in total?

GX_PERF1_TEXELS

#define GX_PERF1_TEXELS   0

Number of texels processed by the GP.

GX_PERF1_TX_IDLE

#define GX_PERF1_TX_IDLE   1

Number of clocks that the texture unit (TX) is idle.

GX_PERF1_TX_MEMSTALL

#define GX_PERF1_TX_MEMSTALL   3

Number of GP clocks the TX unit is stalled waiting for main memory.

GX_PERF1_TX_REGS

#define GX_PERF1_TX_REGS   2

Number of GP clocks spent writing to state registers in the TX unit.

GX_PERF1_VC_ALL_STALLS

#define GX_PERF1_VC_ALL_STALLS   15

GX_PERF1_VC_ELEMQ_FULL

#define GX_PERF1_VC_ELEMQ_FULL   9

GX_PERF1_VC_MEMREQ_FULL

#define GX_PERF1_VC_MEMREQ_FULL   11

GX_PERF1_VC_MISS_REQ

#define GX_PERF1_VC_MISS_REQ   19

Number vertex cache miss request. Each miss requests a 32B transfer from main memory.

GX_PERF1_VC_MISSQ_FULL

#define GX_PERF1_VC_MISSQ_FULL   10

GX_PERF1_VC_MISSREP_FULL

#define GX_PERF1_VC_MISSREP_FULL   13

GX_PERF1_VC_STATUS7

#define GX_PERF1_VC_STATUS7   12

GX_PERF1_VC_STREAMBUF_LOW

#define GX_PERF1_VC_STREAMBUF_LOW   14

GX_PERF1_VERTICES

#define GX_PERF1_VERTICES   16

Number of vertices processed by the GP.