CPU architecture configuration

Collaboration diagram for CPU architecture configuration:

Macros
#define	LITTLE_ENDIAN   3412
#define	BIG_ENDIAN   1234
#define	BYTE_ORDER   BIG_ENDIAN
#define	LITTLE_ENDIAN   3412
#define	BIG_ENDIAN   1234
#define	BYTE_ORDER   BIG_ENDIAN

Detailed Description

The CPU architecture configuration is where the endianess of the CPU on which uIP is to be run is specified. Most CPUs today are little endian, and the most notable exception are the Motorolas which are big endian. The BYTE_ORDER macro should be changed to reflect the CPU architecture on which uIP is to be run.

Macro Definition Documentation

BIG_ENDIAN [1/2]

#define BIG_ENDIAN   1234

BIG_ENDIAN [2/2]

#define BIG_ENDIAN   1234

BYTE_ORDER [1/2]

#define BYTE_ORDER   BIG_ENDIAN

The byte order of the CPU architecture on which uIP is to be run.

This option can be either BIG_ENDIAN (Motorola byte order) or LITTLE_ENDIAN (Intel byte order).

BYTE_ORDER [2/2]

#define BYTE_ORDER   BIG_ENDIAN

The byte order of the CPU architecture on which uIP is to be run.

This option can be either BIG_ENDIAN (Motorola byte order) or LITTLE_ENDIAN (Intel byte order).

LITTLE_ENDIAN [1/2]

#define LITTLE_ENDIAN   3412

LITTLE_ENDIAN [2/2]

#define LITTLE_ENDIAN   3412